ip stresser

FACULTY DETAILS

Faculty Name : Mrs. PRIYADARSHINI N J

Qualification:

  • M.Tech in VLSI and Embedded Systems

Contact Details

Email ID priyadarshininj_ee@atme.edu.in 
LinkedIn ID
Google Scholor  ID
Orcid ID
Vidwaan ID https://vidwan.inflibnet.ac.in/profile/266759
Scopus ID

Professional Experience

  • Industry: 1 year 8 months
  • Teaching: 8 months

Publication Details:

  1. Mr. Kumar N Krishnamurthy, Ms. Priyadarshini N J, “Design of Low Power and Area Efficient Cmos Full Adder Using Pass Transistor Logic”, Our Heritage, Vol.68, Issue 30, Jan 2020.
  2. Ms. Priyadarshini N J, Mr. Kumar N Krishnamurthy, “A PTL Based Full Adder Design using

Cadence”, IJRASET, Vol.8, Issue VII, Aug 2020.

Roles and Responsibilities

  • Officiating as Assistant Professor
  • Advises undergraduate projects
  • Actively participates in research activities through writing for publication, developing own research, presenting at conferences, etc
  • Engages with colleagues wherever possible, in consultancy activities and activities relevant to the college
  • Establishes and maintains relevant professional and industrial links, as necessary, for the effective operation of the department’s courses
  • Participates in the development and preparation of teaching materials
  • Participates and suggests relevant staff development activities
  • Provides personal guidance for students

ip stres