Student Learning Centric
Department YouTube Channel for Lab Videos: Link
VTU Scheme and Syllabus_2018_ECE: Link
VTU Scheme and Syllabus_2021_ECE: Link
Academic Year – 2022-23 (Even Sem)
CM=Course Module || LP=Lesson Plan
|
6th Semester |
||||||
| Sl. No. | Subject/Lab Code | Subject/ Lab Name | CM | LP | NOTES/ LAB |
PPT |
| 1 | 18EC61 | Digital Communication | Link | Link | Link | Link |
| 2 | 18EC62 | Embedded Systems | Link | Link | Link | Link |
| 3 | 18EC63 | Microwave & Antennas | Link | Link | Link | Link |
| 4 | 18EC644 | Digital System Design using Verilog | Link | Link | Link | Link |
| 5 | 18ECL66 | Embedded Systems Laboratory | Link | Link | Link | Link |
| 6 | 18ECL67 | Communication Laboratory | Link | Link | Link | Link |
|
8th Semester |
||||||
| Sl.No. | Subject/Lab Code | Subject/ Lab Name | CM | LP | NOTES/ LAB | PPT |
| 1 | 18EC81 | WIRELESS AND CELLULAR COMMUNICATION | Link | Link | Link | Link |
| 2 | 18EC821 | Network Security | Link | Link | Link | Link |
Academic Year – 2022-23 (Odd Sem)
CM=Course Module || LP=Lesson Plan
| 3rd Semester | ||||||
| Sl. No. | Subject/Lab Code | Subject/ Lab Name | CM | LP | NOTES/ LAB | PPT |
| 1 | 21MAT31 | Mathematics Course | Link | Link | Link | Link |
| 2 | 21EC32 | Digital System Design using Verilog | Link | Link | Link | Link |
| 3 | 21EC33 | Basic Signal Processing | Link | Link | Link | Link |
| 4 | 21EC34 | Analog Electronic Circuits | Link | Link | Link | Link |
| 5 | 21ECL35 | Analog & Digital Electronics Lab | Link | Link | Link | Link |
| 5th Semester | ||||||
| Sl. No. | Subject/Lab Code | Subject/ Lab Name | CM | LP | NOTES/ LAB | PPT |
| 10 | 18ES51 | Technological Innovation Management & Entrepreneurship | Link | Link | Link | Link |
| 11 | 18EC52 | Digital Signal Processing | Link | Link | Link | Link |
| 12 | 18EC53 | Principles Of Communication System | Link | Link | Link | Link |
| 13 | 18EC54 | Information Theory and Coding | Link | Link | Link | Link |
| 14 | 18EC55 | Electromagnetic Waves | Link | Link | Link | Link |
| 15 | 18EC56 | Verilog HDL | Link | Link | Link | Link |
| 16 | 18ECL57 | DSP Laboratory | Link | Link | Link | Link |
| 17 | 18ECL58 | HDL Laboratory | Link | Link | Link | Link |
| 7th Semester | ||||||
| Sl NO | Course Code | Subject Name | CM | LP | NOTES/ LAB | PPT |
| 1 | 18EC71 | COMPUTER NETWORKS | Link | Link | Link | Link |
| 2 | 18EC72 | VLSI DESIGN | Link | Link | Link | Link |
| 3 | 18EC732 | SATELLITE COMMUNICATION | Link | Link | Link | Link |
| 4 | 18EC743 | MULTIMEDIA COMMUNICATION | Link | Link | Link | Link |
| 5 | 18ECL76 | COMPUTER NETWORKS LAB | Link | Link | Link | Link |
| 6 | 18ECL77 | VLSI LAB | Link | Link | Link | Link |